Date: Thursday 19/1/2012
Time: 1.00 pm
Speaker: Prof. Alejandro Linares Barranco
Affiliation: University of Seville, SPAIN
The Neuromorphic AER: Spiking from sensors to actuators
By Prof. Alejandro Linares Barranco
University of Seville, SPAIN
Neuromorphic was coined by Carver Mead lab to describe VLSI systems containing circuits that mimic neuro-biological architectures presents in the nervous system. AER (Address-Event-Representation) is nowadays a popular “virtual wiring” technique for interconnecting spiking neuromorphic systems. The high-speed available for digital inter-chip communications is exploited in AER to time-multiplex numerous synaptic connections between neurons, which only need to be active during a spike (also called event) transmission. In AER, whenever a spiking neuron in a chip (VLSI or FPGA) generates a spike, its “address” (or any given identification) is written on a high speed digital bus and sent to the receiving neuron(s) in one (or more) receiver chip(s). There are several labs and groups, with different funded projects (national and EU), working in designing new neuromorphic systems for improving classical problems solving and for applying this concept to real applications. This talk has the aim to introduce the neuromorphic AER concept and show examples and applications that use spikes for sensors, for processing information and for actuating directly to motors.
Alejandro Linares-Barranco is Associate Professor at University of Seville, SPAIN, since 2009. He belong to the department of Architecture and Technology of Computers and to the Robotic and Technology of Computers Lab. He was a researcher in the EU CAVIAR project (2002-2006). His lab was in charge of (1) developing efficient AER-tools for connecting AER systems and for debugging, and (2) implementing AER processing algorithms into FPGAs. He has visited several neuromorph labs, like the Institute of Neuroinformatics in Zurich or the e-Lab at Yale University (now moved to Purdue University). He has participated as invited speaker both in the Telluride Neuromorphic Engineering Workshop (CO, USA) and the CappoCacia Cognitive Neuromorphic Workshop (Italy). He is secretary of the Neural Systems and Applications Technical Committee (NSATC) of the IEEE Circuits and Systems Society. He has written more than one hundred papers (including book chapters, journals and conference papers).