Reduced Rank Image Series Decompositions and their Applications
Date: Wednesday 29/6/2011
Venue: MS020
Time: 1.00 pm
Speaker: Dr Venkatesh K Subramanian
Affiliation:
Indian Institute of Technology Kanpur, India.
Reduced Rank Image Series Decompositions and their Applications
By Dr Venkatesh K Subramanian
Indian Institute of Technology Kanpur, India.
Abstract
Most displays are pixel arrays in which individual pixels are addressed through row and column address lines. Conventional image writing into non-active matrix displays is considerably slowed by our inability to address - and hence, to illuminate - more than one row of pixels at a time. Many measures have been proposed to solve this problem, but they either degrade the image by reducing its vertical resolution for example, or by excessively depending upon inherent patterns in the image. Thus existing solutions either have undesirable side-effects or are not sufficiently general, to apply upon arbitrary images on the fly.
We propose as a solution a general approach that represents an arbitrary image as a convergent series of unit rank image components, each term of which can be exhibited upon the display by exciting all the row and column address lines simultaneously. This unprecedented possibility increases the individual pixel duty cycle by over two orders of magnitude even for small displays (say, 240 x 320, as on a mobile phone) and will have a corresponding impact on the dynamic contrast, or upon the frame rate, as we choose. Furthermore, it obviates the need for active matrix pixel addressing, even for non-bistable display elements, which should reduce the cost of a display significantly.
Other positive consequences are a significant reduction in instantaneous driving currents, without diminishing the temporal average screen brightness, reduced perceived flicker due to the improved duty cycles, a significant compression of the image data, and inherent amenability to streaming that allows a dynamic compromise of quality under communication bandwidth constraints. The price to be paid is some latency besides the need for in-display real-time computing power. This approach is expected to particularly benefit OLED based displays that have failed to reach the market due to high cost and low working lifetimes. Future possibilities include fast writing into multidimensional memory arrays.
Short Biography
Venkatesh K S completed hiis BE in Electronics from BMS Engineering College, Bangalore, in 1987. Pursued his MTech in Communication Systems at Indian Institute of Technology, Kanpur, and produced a dissertation on 'Additive Conjoint Measurement over Incomplete Orders', a problem in the area of Rational Choice Theory in 1989. Got his PhD also from IIT Kanpur (1989-1995), on a mathematical generalization of classical Signal and System Theory to the realm of sets and general topological spaces.
Worked as Assistant Professor in the Electronics and Communication Department of IIT Guwahati from 1995 to 1999, and then moved to the Electrical Engg. Dept. of IIT Kanpur, where he is working since. Present areas of research interest include image/video processing with applications in computer vision areas such as automated high level analysis of surveillance videos, vision for robot navigation, machine and industrial vision problems, novel human computer interfaces and light fields. Other areas of activity include bio- mathematical modeling for pharmaceutical drug delivery, abstract system theory and rational choice theory.
