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From Brain Science to Intelligent Machines

A Case Study on neuroprosthetic applications Using Neural Network FPGA Based Hardware Modelling

Date: Wednesday 10/10/2012
Venue: MS020
Time: 1.00 pm
Speaker: Dr. Shufan Yang
Affiliation: Intelligent Systems Research Centre
University Of Ulster, Magee



A Case Study on neuroprosthetic applications Using Neural Network FPGA Based Hardware Modelling

By Dr. Shufan Yang
Intelligent Systems Research Centre
University Of Ulster, Magee

Abstract:

Integrating hardware into neural network modelling builds an effective bridge between electronic engineers and computational neuroscientists, allowing the latter to contribute more effectively in neuroengineering projects and thus speed up the time-to-market of neurotechnology products. In this work, we propose a neural mechanism for adaptive inhibitory control in a firing-rate type model based on current findings in animal electrophysiological and human psychophysical experiments. We then implement this model based on a field-programmable gate array (FPGA) prototyping system using dedicated real-time hardware circuitry. We anticipate that a fast FPGA-based prototyping platform with hardware evaluation framework will be useful in domains such as neuroprosthetic device, robotics, and bionic creativity engineering.

Short biography:

Dr Shufan Yang works on projects related with neural network FPGA based hardware modelling, led by Professor T.M. McGinnity at Intelligent Systems Research Centre, University of Ulster. She focuses on the development of methodologies to support the large scale simulation of Spiking Neural Networks (SNNs) on multiple FPGA platforms. She undertakes research in the general area of embedded system design with particular interests in bio-inspired and neuro-engineering and associated algorithm issues.
Shufan obtained her Ph.D in Computer Science from the University of Manchester (2010), supervised by Professor Steve Furber. Her Ph.D project was to implement a high-performance multiprocessor communication system for SpiNNaker chips that are used for the real-time modelling of large systems of spiking neurons. She did B.Sc. degree and M.Sc. degree at Hunan University, China. From 2003 to 2006, she was lecturer of Computer Science and chair of the Embedded and Networking Systems Laboratory in Hunan University, China. She was a software engineer from 1998 to 2000. Major projects in which she has been involved have included handset on-access layer implementation under VxWorks and implementation of embedded firewall on PowerPC boards.